Wireline test (LAN, DSL, cable)

Test & measurement se wireline test (LAN, DSL, cable) integrated circuits and reference designsintegrated circuits and reference designs

Description

Wide bandwidth, high dynamic range frontend with low-noise clock is critical for analyzing the amplitude and timing of the LAN/WAN signals. Our integrated circuits and reference designs help you design high-performance data acquisition and arbitrary waveform generation frontend for LAN/WAN test equipment.

    High-performing LAN / WAN test equipment often requires:

  • High-speed data converters that help with timing and noise margin measurement
  • Low-phase noise clocks for improved timing margins and jitter measurements
  • Efficient power supply that minimizes board area and improves thermal performance
  • Low EMI power architecture that improves system sensitivity and dynamic range
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Technical documentation

Application notes & user guides

Application Notes (5)

Title Type Size (KB) Date
PDF 6.09 MB 08 Aug 2017
PDF 2.56 MB 20 Jul 2017
PDF 1.63 MB 21 Jul 2016
PDF 70 KB 26 Apr 2013
PDF 505 KB 25 Apr 2010

User Guides (1)

Title Type Size (KB) Date
pdf 1.96 MB 20 Sep 2018

Product bulletin & white papers

White Papers (1)

Title Type Size (MB) Date
PDF 91 KB 01 May 2007

Technical articles

Support & training

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